How can AI Revolutionise Hardware Verification?

The design verification (DV) phase of hardware design is often the long pole in the whole design process, requiring highly specialised skills and tools. The length and complexity of the task often makes it difficult to accommodate design changes that require the verification phase to be redone.

Can AI be used to help speed up hardware verification, as well as improve the quality of the verification? Formal verification can deliver high levels of assurance, but requires very specialist skills e.g. for writing SystemVerilog Assertions and effectively using sophisticated formal verification tools like Cadence Jasper Gold for model checking.

Can AI help to democratise formal verification by making it much easier to produce formal properties of hardware?

Key benefits:

• An understanding of what key hardware verification challenges are not adequately met using conventional testing and model checking techniques, and an appreciation of the limitations of conventional automation for verification 
• An appreciation of how AI can improve the productivity of existing design verification flows e.g. making it easier to produce formal properties for model checking
• An insight into how AI can go further by proving properties using symbolic techniques e.g. by exploiting interactive theorem provers, which provides a path to proving properties